1. Field of the Invention.
The present invention relates to electronic semiconductor device fabrication, and, more particularly, to ion implantation annealling.
2. Description of the Related Art.
The fabrication of electronic semiconductor devices and integrated circuits requires the introduction of electrically active impurities (dopants) of various types into semiconductor material to provide needed varying electrical properties. Dopants can be introduced into semiconductor material by several methods: solid diffusion, ion implantation, alloying, and in situ doped semiconductor crystal growth. Currently, ion implantation is the most popular method for many applications.
Ion implantation is the injection of ionized-projectile atoms (dopants) into semiconductor material targets with enough energy to penetrate beyond surface regions. The most common application is the doping of silicon during device fabrication, and the depth of implantation is nearly proportional to the ion energy and can be selected to meet a particular application. Advantages of ion implantation include the avoidance of surface barriers that may affect diffusion doping and the capability to precisely control the number of implanted dopant atoms. See generally S.M.Sze Ed., VLSI Technology, ch.6 (McGraW-Hill 1983).
Ions entering a crystal at high energy undergo numerous scatterings, lose energy, and eventually come to rest in the crystal, but the scatterings displaces atoms in the crystal lattice and creates lattice damage. Various defects typically mark the track of an ion coming to rest in a crystal including vacancies and dislocations. Further, the implanted dopant ions usually do not end up on lattice sites and are not electrically active. Therefore the implanted crystal is annealed to eliminate lattice damage and to activate the implanted dopants by movement onto lattice sites. However, annealing implies diffusion of the implanted dopants, and it is a problem to anneal without significant diffusion.
The use of rapid thermal annealing (RTA) for implanted dopant activation allows fast turn around times with preservation of shallow diffusion profiles and good activation. The RTA of beryllium (Be) implanted into gallium arsenide (GaAs) has been used to make the p.sup.+ contact to the base of bipolar transistors (see P.Asbeck et al. 4 IEEE Elec.Dev.Lett. 81 (1983)) and to make p-i-n diodes (see K. Tabatabaie-Alavi et al., 43 Appl.Phys.Lett. 647 (1983)). Additional characterization has been done on low energy implants where a lower activation than in high energy implants has been observed. See N. Barett et al, 35 Mat.Res.Soc. Symp.Proc. 451 (1985); also see P. Chambon et al, 46 Appl.Phys.Lett 162 (1985). This low activation in the near surface region should be minimized to insure good ohmic contact to a p.sup.+ implant region. One possible reason for a low near surface implant activation could be loss of Be to the surface. In furnace annealing Be out-diffusion has been observed for Be concentrations above 1.times.10.sup.18 / cm.sup.3 and for temperatures at or above 800.degree. C. See W. McLevige et al, 25 Solid State Comm. 1003 (1978) and 48 J.Appl.Phys. 3342 (1977).
The RTA process should be tailored to meet the specific activation implant requirements, whether to achieve high activation of a base region or to sacrifice the activation of the deep end of a p+ region to maximize the activation of the near surface p+ region. By examining both the RTA process and the furnace results, the RTA of p.sup.+ implant regions can be optimized. In furnace annealing, as the temperature is ramped up, crystalline recovery begins prior to the electrical activation of the Be implant; see P. Chambon et al 45 Appl.Phys.Lett. 390 (1984). The 1985 Chambon reference has pointed out that the maximum implantation defect density should be preserved until the Be atoms move on to substitutional sites and become electrically active. Although a short time high temperature anneal is then optimum for activating the Be while minimizing redistribution, it may not remove all, or enough, of the crystal damage accumulated during the high dose ion implantation. It has been pointed out that for silicon implanted in GaAs that too high a pre-heat step with RTA reduces the activation; see the first Barett reference. Additionally, the Barett reference noted that for Be activation only a minimum dwell time at the anneal temperature is necessary, where increases in time or temperature resulted in only minimal improvement at best. But there is a problem in the known RTA methods for Be implanted into GaAs of dopant diffusion.